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LT3466-1
APPLICATIO S I FOR ATIO
The V CE(SAT) and V BE(SAT) values for the transistor Q1 can
be obtained from the Philips BC807 data sheet:
ground plane and not shared with any other component,
except the R T resistor, ensuring a clean, noise-free con-
R BASE =
16 V – 5 V + 0 . 1 – 0 . 9
0 . 75 mA
nection. Recommended component placement is shown
in the Figure 11.
R BASE = 13.6k
Picking the closest 1% resistor value yields:
R BASE = 14k
GND
C OUT1
R FB1
BOARD LAYOUT CONSIDERATION
C IN
L1
1
10
R T
CTRL1
As with all switching regulators, careful attention must be
paid to the PCB board layout and component placement.
To prevent electromagnetic interference (EMI) problems,
proper layout of high frequency switching paths is essen-
V IN
L2
2
3
4
5
11
9
8
7
6
R2
CTRL2
tial. Minimize the length and area of all traces connected to
R1
the switching node pins (SW1 and SW2). Keep the feed-
back pins (FB1 and FB2) away from the switching nodes.
GND
C OUT2
34661 F10
The DFN package has an exposed paddle that must be
connected to the system ground. The ground connection
for the feedback resistors should be tied directly to the
Figure 11. Recommended Component Placement
34661f
14
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